; generated by Component: ARM Compiler 5.05 (build 41) Tool: ArmCC [4d0eb9]
; commandline ArmCC [--thumb --list --debug -c --asm --interleave -o.\obj\board_init.o --asm_dir=.\Obj\ --list_dir=.\Obj\ --depend=.\obj\board_init.d --apcs=interwork -O0 -IC:\Keil\ARM\RV31\INC -IC:\Keil\ARM\CMSIS\Include -IC:\Keil\ARM\Inc\Philips --omf_browse=.\obj\board_init.crf board_init\board_init.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  init_PLL PROC
;;;17     
;;;18     void init_PLL(void)
000000  4a42              LDR      r2,|L1.268|
;;;19     {
;;;20         unsigned MValue, NValue;
;;;21       
;;;22         if ( PLLSTAT & (1 << 25) )
000002  6892              LDR      r2,[r2,#8]
000004  2301              MOVS     r3,#1
000006  065b              LSLS     r3,r3,#25
000008  401a              ANDS     r2,r2,r3
00000a  2a00              CMP      r2,#0
00000c  d006              BEQ      |L1.28|
;;;23         {
;;;24       	PLLCON = 1;			/* Enable PLL, disconnected */
00000e  2201              MOVS     r2,#1
000010  4b3e              LDR      r3,|L1.268|
000012  601a              STR      r2,[r3,#0]
;;;25       	PLLFEED = 0xaa;
000014  22aa              MOVS     r2,#0xaa
000016  60da              STR      r2,[r3,#0xc]
;;;26       	PLLFEED = 0x55;
000018  2255              MOVS     r2,#0x55
00001a  60da              STR      r2,[r3,#0xc]
                  |L1.28|
;;;27         }
;;;28       
;;;29         PLLCON = 0;				/* Disable PLL, disconnected */
00001c  2200              MOVS     r2,#0
00001e  4b3b              LDR      r3,|L1.268|
000020  601a              STR      r2,[r3,#0]
;;;30         PLLFEED = 0xaa;
000022  22aa              MOVS     r2,#0xaa
000024  60da              STR      r2,[r3,#0xc]
;;;31         PLLFEED = 0x55;
000026  2255              MOVS     r2,#0x55
000028  60da              STR      r2,[r3,#0xc]
;;;32           
;;;33         SCS |= 0x20;			/* Enable main OSC */
00002a  4a39              LDR      r2,|L1.272|
00002c  6a12              LDR      r2,[r2,#0x20]
00002e  2320              MOVS     r3,#0x20
000030  431a              ORRS     r2,r2,r3
000032  4b37              LDR      r3,|L1.272|
000034  621a              STR      r2,[r3,#0x20]
;;;34         while( !(SCS & 0x40) );	/* Wait until main OSC is usable */
000036  46c0              MOV      r8,r8
                  |L1.56|
000038  4a35              LDR      r2,|L1.272|
00003a  6a12              LDR      r2,[r2,#0x20]
00003c  2340              MOVS     r3,#0x40
00003e  401a              ANDS     r2,r2,r3
000040  2a00              CMP      r2,#0
000042  d0f9              BEQ      |L1.56|
;;;35       
;;;36         CLKSRCSEL = 0x1;		/* select main OSC, 12MHz, as the PLL clock source */
000044  2201              MOVS     r2,#1
000046  4b31              LDR      r3,|L1.268|
000048  3380              ADDS     r3,r3,#0x80
00004a  60da              STR      r2,[r3,#0xc]
;;;37       
;;;38         PLLCFG = PLL_MVAL | (PLL_NVAL << 16);
00004c  220b              MOVS     r2,#0xb
00004e  4b2f              LDR      r3,|L1.268|
000050  605a              STR      r2,[r3,#4]
;;;39         PLLFEED = 0xaa;
000052  22aa              MOVS     r2,#0xaa
000054  60da              STR      r2,[r3,#0xc]
;;;40         PLLFEED = 0x55;
000056  2255              MOVS     r2,#0x55
000058  60da              STR      r2,[r3,#0xc]
;;;41             
;;;42         PLLCON = 1;				/* Enable PLL, disconnected */
00005a  2201              MOVS     r2,#1
00005c  601a              STR      r2,[r3,#0]
;;;43         PLLFEED = 0xaa;
00005e  22aa              MOVS     r2,#0xaa
000060  60da              STR      r2,[r3,#0xc]
;;;44         PLLFEED = 0x55;
000062  2255              MOVS     r2,#0x55
000064  60da              STR      r2,[r3,#0xc]
;;;45       
;;;46         CCLKCFG = CCLKDIV;	/* Set clock divider */
000066  2205              MOVS     r2,#5
000068  4b28              LDR      r3,|L1.268|
00006a  3380              ADDS     r3,r3,#0x80
00006c  605a              STR      r2,[r3,#4]
;;;47       
;;;48         while ( ((PLLSTAT & (1 << 26)) == 0) );	/* Check lock bit status */
00006e  46c0              MOV      r8,r8
                  |L1.112|
000070  4a26              LDR      r2,|L1.268|
000072  6892              LDR      r2,[r2,#8]
000074  2301              MOVS     r3,#1
000076  069b              LSLS     r3,r3,#26
000078  401a              ANDS     r2,r2,r3
00007a  2a00              CMP      r2,#0
00007c  d0f8              BEQ      |L1.112|
;;;49           
;;;50         MValue = PLLSTAT & 0x00007FFF;
00007e  4a23              LDR      r2,|L1.268|
000080  6892              LDR      r2,[r2,#8]
000082  0450              LSLS     r0,r2,#17
000084  0c40              LSRS     r0,r0,#17
;;;51         NValue = (PLLSTAT & 0x00FF0000) >> 16;
000086  4a21              LDR      r2,|L1.268|
000088  6892              LDR      r2,[r2,#8]
00008a  23ff              MOVS     r3,#0xff
00008c  041b              LSLS     r3,r3,#16
00008e  401a              ANDS     r2,r2,r3
000090  0c11              LSRS     r1,r2,#16
;;;52         while ((MValue != PLL_MVAL) && ( NValue != PLL_NVAL) );
000092  46c0              MOV      r8,r8
                  |L1.148|
000094  280b              CMP      r0,#0xb
000096  d001              BEQ      |L1.156|
000098  2900              CMP      r1,#0
00009a  d1fb              BNE      |L1.148|
                  |L1.156|
;;;53       
;;;54         PLLCON = 3;				/* enable and connect */
00009c  2203              MOVS     r2,#3
00009e  4b1b              LDR      r3,|L1.268|
0000a0  601a              STR      r2,[r3,#0]
;;;55         PLLFEED = 0xaa;
0000a2  22aa              MOVS     r2,#0xaa
0000a4  60da              STR      r2,[r3,#0xc]
;;;56         PLLFEED = 0x55;
0000a6  2255              MOVS     r2,#0x55
0000a8  60da              STR      r2,[r3,#0xc]
;;;57         while ( ((PLLSTAT & (1 << 25)) == 0) );	/* Check connect bit status */
0000aa  46c0              MOV      r8,r8
                  |L1.172|
0000ac  4a17              LDR      r2,|L1.268|
0000ae  6892              LDR      r2,[r2,#8]
0000b0  2301              MOVS     r3,#1
0000b2  065b              LSLS     r3,r3,#25
0000b4  401a              ANDS     r2,r2,r3
0000b6  2a00              CMP      r2,#0
0000b8  d0f8              BEQ      |L1.172|
;;;58         return;
;;;59     }
0000ba  4770              BX       lr
;;;60     
                          ENDP

                  init_MAM PROC
;;;61     void init_MAM(void)
0000bc  2000              MOVS     r0,#0
;;;62     {
;;;63         MAMCR = 0;
0000be  4913              LDR      r1,|L1.268|
0000c0  3980              SUBS     r1,r1,#0x80
0000c2  6008              STR      r0,[r1,#0]
;;;64         MAMTIM = 3;
0000c4  2003              MOVS     r0,#3
0000c6  6048              STR      r0,[r1,#4]
;;;65         MAMCR = 2;
0000c8  2002              MOVS     r0,#2
0000ca  6008              STR      r0,[r1,#0]
;;;66     }
0000cc  4770              BX       lr
;;;67     
                          ENDP

                  init_PCB PROC
;;;68     void init_PCB(void)
0000ce  4811              LDR      r0,|L1.276|
;;;69     {
;;;70       /* Turn Off all LEDs  */
;;;71       FIO2DIR |= 0x0FF;
0000d0  6800              LDR      r0,[r0,#0]
0000d2  21ff              MOVS     r1,#0xff
0000d4  4308              ORRS     r0,r0,r1
0000d6  490f              LDR      r1,|L1.276|
0000d8  6008              STR      r0,[r1,#0]
;;;72       FIO2CLR |= 0x0FF;
0000da  0008              MOVS     r0,r1
0000dc  69c0              LDR      r0,[r0,#0x1c]
0000de  21ff              MOVS     r1,#0xff
0000e0  4308              ORRS     r0,r0,r1
0000e2  490c              LDR      r1,|L1.276|
0000e4  61c8              STR      r0,[r1,#0x1c]
;;;73     }
0000e6  4770              BX       lr
;;;74     
                          ENDP

                  VectorsRemap PROC
;;;75     void VectorsRemap(void)
0000e8  4770              BX       lr
;;;76     {
;;;77     }
;;;78     
                          ENDP

                  board_init PROC
;;;79     void board_init(void)
0000ea  b510              PUSH     {r4,lr}
;;;80     {
;;;81         Timer_init();
0000ec  f7fffffe          BL       Timer_init
;;;82         init_PLL();
0000f0  f7fffffe          BL       init_PLL
;;;83     	// wait for PLL to complete initialization after POR
;;;84     	Timer_Delay(100);
0000f4  2064              MOVS     r0,#0x64
0000f6  f7fffffe          BL       Timer_Delay
;;;85     	init_MAM();
0000fa  f7fffffe          BL       init_MAM
;;;86     	init_PCB();
0000fe  f7fffffe          BL       init_PCB
;;;87     	VectorsRemap();
000102  f7fffffe          BL       VectorsRemap
;;;88     }
000106  bc10              POP      {r4}
000108  bc08              POP      {r3}
00010a  4718              BX       r3
                          ENDP

                  |L1.268|
                          DCD      0xe01fc080
                  |L1.272|
                          DCD      0xe01fc180
                  |L1.276|
                          DCD      0x3fffc040
